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(2) The true side of each flip-flop is available as an output (1) Each flip-flop has an asynchronous CLEAR input Now let take an example of 8-bit serial in parallel out register (IC74164) and see its logic diagram and pin diagram in bellow.Īs it is 8-bit so it has eight S-R flip-flops, which are all sensitive to negative clock transitions. Once the data is stored in the flip flop the bits are available simultaneously. And we can get this parallel output by connecting the output of each flip flop to an output pin. So question is how to obtain the output data in parallel? For that it is required that all the output bits are available at the same time. In serial in parallel out register (SIPO), the input data is entering and shifted in serially, but output taken in parallel. Now we see the construction and working principle of serial in parallel out register (SIPO). As we see in my previous post that construction and working principle of serial in serial out register (SISO). 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